Speaker:

Gerd Ascheid, RWTH Aachen University, Germany

Title:

Energy efficient transceiver implementation: advocating a new design paradigm

Abstract:

While future technologies provide an almost unlimited amount of gates, power/energy consumption is an issue, in particular, with consumer packaging of ICs. Thus, although high throughput may be achieved by massively parallel processing on many-core architectures, energy/power may pose a challenging limit. Under such a limit the transceiver design problem is no longer to find the most energy efficient implementation of given processing algorithms but to get the best communication performance within a given limited energy/power budget. It will be discussed how this optimization task should be defined properly, potentially leading to a shift in transceiver design paradigms. The conclusions are already of high relevance for upcoming wireless standards but they are indispensable when exploring wireless communication systems supporting 100 Gb/s and beyond where the trade-offs must even include shifting of signal processing from digital to analog.

Bio:

Gerd Ascheid (Senior Member IEEE) received the Dipl.-Ing. and Dr.-Ing. degrees in Electrical Engineering (Commun. Eng.) from RWTH Aachen University. Before being appointed to a full professor position at RWTH Aachen University he worked 9 years for SYNOPSYS, a California-based EDA market leader, where his last position was Senior Director, Wireless & Broadband Communications Service Line. Since April 2003 Gerd Ascheid heads the Institute for Integrated Signal Processing Systems and since October 2012 he is Speaker of the ICT (Information and Communication Technologies) profile area at RWTH Aachen University. His research interest is in mobile communication, with focus on the physical layer, application specific processing architectures, in particular, heterogeneous MPSoC platforms, and flexible transceivers (Software Defined Radio, SDR). He is co-founder of CADIS and of LisaTek, EDA tool providers which both are now part of Synopsys Inc.