13th International Forum on Embedded MPSoC and Multicore
July 15-19, 2013, Otsu, Japan
Speaker:
Keiji Kimura, Waseda University, Japan
Title:
OSCAR API v2.1 with flexible accelerator control facilities
Abstract:
Various multicores are now equipped with accelerators such as GPU and other SIMD cores. These heterogeneous systems are getting important especially in embedded computing area since required performance must be served within limited power budget for embedded applications. However, achieving this goal is extremely difficult for ordinary application developers. They must consider both parallelization on heterogeneous cores and power consumption. OSCAR parallelizing compiler, which has been developed in Waseda University, solves these problems by multigrain parallelization and low power optimization. In order to apply such powerful optimizations to various kinds of platforms, OSCAR API has been also developed as an interface between OSCAR compiler and those platforms, such as ordinary SMPs and also embedded heterogeneous multicores. In this talk, OSCAR API v2.1 is introduced. OSCAR API v2.1 has several directives to realize flexible and fine-grain accelerator control in addition to the thread control, memory allocation, data transfer, flexible synchronization, realtime execution, cache control and power control provided until v2.0.
Bio:
Keiji Kimura received the B.S., M.S. and Ph. D degrees in electrical engineering from Waseda University, in 1996, 1998, 2001 respectively. He was an assistant professor in 2004, associate professor of Department of Computer Science in 2005, and professor in 2012 at Waseda University. His research interest includes microprocessor architecture, multiprocessor architecture, multicore processor architecture, and there compiler. He is a member of IPSJ, ACM and IEEE. He has served on program committee of conferences such as ICCD, ICPP, LCPP, IISWC and ICS.