13th International Forum on Embedded MPSoC and Multicore
July 15-19, 2013, Otsu, Japan
Speaker:
Yukoh Matsumoto, TOPS Systems Corporation, JapanTitle:
SMYLEvideo distributed stream processing heterogeneous Manycore architecture for Video Mining Applications
Abstract:
Our objective is to provide a scalable Manycore processor to enable software based real-time processing of various Video Mining applications for several embedded systems, such as auto-motives, digital cameras, digital TVs, video surveillance systems, etc. We intensively worked on architecture-algorithm co-design, and designed a distributed processing application software based on Kahn Process Networks (KPN) and a Video Mining application domain specific scalable manycore processor architecture SMYLEvideo with having clustered heterogeneous cores. We improved performance scalability of Manycore with minimizing inter-process communication overhead by an innovative HW/SW mechanism implemented on each core and with special inter-core event communication network. We also reduced external memory access bandwidth and capacity requirement, that also limit the performance scalability of Manycore, by optimizing data passing granularity of distributed processing software, and by utilizing on chip core to core data passing mechanism. We also improved energy-efficiency and performance per cost with required reducing hardware resources, such as datapath width of each data processing core as well as the number of cores. As a result we architected a heterogeneous manycore SMYLEvideo with 64-bit and 256-bit data processing cores with having Video Mining application domain specific instruction extensions. The SMYLEvideo runs at only 100MHz, however, for example it can scale its image recognition performance based on SIFT algorithm from 15fps, 30fps, 60fps with scaling the number of cores from one master core plus 10 cores in 2 clusters, 20 cores in 4 clusters, up to 40 cores in 8 clusters, respectively.
Bio:
Dr. Yukoh Matsumoto is the chief architect, and president and CEO of TOPS Systems Corp. as well as the chief architect, and president and CEO of Cool Soft Corp. In his 27 years of carrier, he has architected and designed over 10 advanced microprocessors such as, Embedded Application Domain Specific Manycore / Multicore, x86 processors, and DSPs. He founded TOPS Systems Corp. in 1999 as a startup for next-generation Multicore R & D and IP business. He received the Takeda Techno-Entrepreneurship Award, Tsukuba Venture Award, and ET Award in 2001, 2010, and 2011 respectively. Prior to TOPS Systems, he has held several positions within Texas Instruments and its Research and Development organization in US and Japan. He received the Dr. of Information Sciences (the Ph.D.) degree from the Graduate School of Tohoku University in 2007, and prior to that he participated in the MOT (Management of Technology) program at the Graduate School of Engineering in Tokyo University from 2004 through 2005. Currently, he is the director of Japan Semiconductor Venture Association (JASVA), and the member of Microprocessor Technical Committee, Multi/Manay-core Platform Standardization Committee, Information System Disruptive Technology Research Committee, and 3D Semiconductor Sub-Committee of Japan Electronics & Information Technology Industries Association (JEITA).