Speaker:

Joeël Monnier, Kalray, France

Title:

Manycore Challenges for the Next Generation of Professional Applications

Abstract:

The end of Dennard scaling in MOSFET devices is the main motivation for moving applications to multicore architectures. Precisely, since the 90nm technology node, the maximum chip operating frequency no longer improves, while the power per unit of area at this frequency increases. In order to benefit from higher levels of chip integration, future manycore processors will operate at moderate frequency and may only activate a subset of their computation and communication resources. Another observation is that architecturing a manycore processor by composing many replicated tiles enable higher manufacturing yields, as it provides redundancy to work around defects. These trends in manycore processor architectures are exemplified by the Kalray MPPA processor family. In this presentation, we discuss the challenges of mapping the next generation of professional applications on manycore architectures with large number of general-purpose cores and a high degree of replication. A distinguishing feature of these applications is heterogeneity, that is, being composed from different programming models: user interfaces and communication stacks running on commodity operating systems; security-critical or time-critical parts with certification constraints; and computation intensive parts. The Kalray MPPA processor architecture and its run-time software enable applications to exploit parallelism under varying profiles, where the execution resources and operating frequency are constrained by the environment. The Kalray architecture and software also support the gradual transition of applications from multicore CPU to accelerated execution on one or several manycore processors.

Bio:

Joel Monnier has served as Kalray President, Chief Executive Officer and Chairman of the board of directors since the inception of the company in 2008. Most recently, Mr Monnier was Corporate Vice President of STMicroelectronics in charge of R&D from 1989 to 2004. In this function, he has been the main executive for the emergence of the Crolles Microelectronics Centers, a joint-venture with STM, NXP and Freescale, representing the largest semiconducting fab in Europe. Previously, he spent several years of his career (from 1983 to 2004) in various executive positions in STMicroelectronics (initially Thomson CSF EFCIS) where he was a key officer in defining the strategy and vision of the group, strengthening its competitiveness in order to guarantee its technological independence. He has promoted and supported ST participation in many cooperative European R&D programs like MEDEA+. Prior to that, he worked 9 years for Texas Instruments in various positions both in the USA and in France as COO. He received an MSEE from the INPG ( "Institut National Polytechnique de Grenoble") and obtained a doctorate at the LETI research center. He was awarded the 2003 European SEMI Award in recognition of his contribution to the European semiconductor industry and its overall development and is "Chevalier de l’ Ordre National du Mérite".