13th International Forum on Embedded MPSoC and Multicore
July 15-19, 2013, Otsu, Japan
Speaker:
Chris Rowen, Cadence, USA
Title:
Grand Challenge Scaling - Pushing a Fully Programmable TeraOp into Handset Imaging
Abstract:
Among the new volume platforms like smartphones, tablets, TVs, game consoles and cars, "killer apps" are increasingly driven by sophisticated imaging and vision functions. The problem is clear - performance must scale towards a teraOp (10^12 operations per second), but sustained power budgets must remain in hundreds of milliwatts. Most dauntingly, ease of programming must match that of generic CPU apps development. This talk describes the technical demands of emerging imaging, video and vision applications at the heart of next generation platforms, and outlines new solutions illustrated with the Tensilica IVP architecture, built for scalability and parallelism in instruction issue, compound pixel ops, wide SIMD vectors, streaming memory and multi-core clusters.
Bio:
Dr. Chris Rowen is Chief Technology Officer of Tensilica, which he founded in July 1997. He was a pioneer in the development of RISC architecture at Stanford in the early 80s and helped start MIPS Computer Systems Inc. in 1984, where he served in a variety of functions including as Vice President for Microprocessor Development. When Silicon Graphics purchased MIPS, he became the technology and market development leader for Silicon Graphics Europe. In 1996, he became Synopsys’ Vice President and General Manager of the Design Reuse Group. He received a B.A. in physics from Harvard University and M.S. and Ph.D. in electrical engineering from Stanford University.