Speaker:

Kees Vissers, Xilinx, USA

Title:

Programming vision Applications on Zynq using OpenCV and High-Level Synthesis

Abstract:

In many vision applications a starting point is a visual library of algorithms in OpenCV. In this talk we will show how we move from the development environment of OpenCV on a laptop with a webcam, to a complete application running on the Zynq 702 board with attached HDMI based HDTV camera and screen. We will show an edge detection based motion detection application, that is indicative for the workloads of embedded vision applications. We will show the mapping on the Zynq processor + FPGA fabric, and will show the performance in the range of 1 fps on Intel processors with OpenCV libraries, in the range of one frame per several seconds on the ARM processors, and a full 1080P 60fps for the implementation on the FPGA. This application, including the processor workload consumes no more than 2 Watt, measured, while running on the board. We will show the integration of the image processing with the processor and the control of the application with a simple attached mouse. The workload of processors and communication infrastructure is measured in real-time and shown on windows in the final application.

Bio:

Kees Vissers graduated from Delft University in the Netherlands. He worked at Philips Research in Eindhoven, the Netherlands, for many years. The work included Digital Video system design, HW -SW co-design, VLIW processor design and dedicated video processors. He was a visiting industrial fellow at Carnegie Mellon University, where he worked on early High Level Synthesis tools. He was a visiting industrial fellow at UC Berkeley where he worked on several models of computation and dataflow computing. He was a director of architecture at Trimedia, and CTO at Chameleon Systems. Today he is heading a small team of researchers at Xilinx. The research topics include next generation programming environments for processors and FPGA fabric, high-performance video systems, wireless applications and new datacenter applications. He is also involved in applications and performance analysis of new memory architectures for the combination of closely integrated FPGA and memory technology.