Speaker:

Yuan Xie, Penn State/AMD Research, USA

Title:

Improving Non-Volatile Cache Lifetime by Reducing Inter- and Intra-Set Write Variations

Abstract:

Limited write endurance is a common problem for emerging non-volatile memory technologies. propose interand intra-set write variation-aware Policy (i2WAP). i2WAP has two novel features: (1) Swap-Shift that reduces inter-set write variations, which is an enhancement based on previous main memory wear-leveling techniques; (2) Probabilistic Set Line Flush that reduces intra-set write variations, which is a new problem of non-volatile caches. i2WAP has a very small hardware overhead, only needing two global counters and two global registers. By adopting i2WAP, we can improve the lifetime of low-level on-chip non-volatile caches by 75% on average and up to 224%

Bio:

Prof. Xie received his B.S. degree from Tsinghua University, and his M.S. and Ph.D. degrees from Electrical Engineering Department, Princeton University. Prior to joining Penn State in Fall 2003, he worked as an Advisory Engineer for IBM Microelectronics Division's Worldwide Design Center. He was a recipient of the NSF CAREER award in 2006.