Speaker:

Sungjoo Yoo, POSTECH, Korea

Title:

Main memory subsystem for graph computation

Abstract:

Graph computation is a challenging task for main memory subsystem design as well as CPU core design. It is characterized by big data and random accesses (difficult to predict future accesses). Future main memory and data management based on novel non-volatile memory (NVM) technologies, e.g., STT-RAM, PRAM or ReRAM, need to be designed to fit with the characteristics of both big graph data and graph computation. In this talk, we introduce our work on hybrid DRAM/NVM main memory subsystem for graph computation.

Bio:

Sungjoo Yoo is currently an associate professor at Department of EE, POSTECH, Korea. He received Ph.D. from Seoul National University in 2000. He worked as researcher at TIMA laboratory, Grenoble France from 2000 to 2004. He was also with Samsung System LSI from 2004 to 2008, where he led system-on-chip architecture design team and was involved in memory and bus architecture designs for mobile application processors and performance modeling and optimization of solid state disk. His research interests include software, architecture and RTL design for low power SoC, and memory and storage hierarchy from cache, DRAM, phase-change RAM, spin-trasnfer torque RAM, resistive RAM to NAND Flash memory. He received Best Paper Award at International SoC Conference (ISOCC) in 2006 and Best Paper Award nominations at Design Automation Conference (DAC) in 2011 and Design Automation and Test in Europe (DATE) in 2002 and 2009.