14th International Forum on Embedded MPSoC and Multicore
July 7-11, 2014, Margaux, France
Slides available here!
Prof. Frédéric Pétrot, TIMA Lab, Grenoble University, France
Automatic Generation of Efficient Dynamic Binary Translators
High-complexity MPSoC contain potentially processors with different instruction sets, processors with different instruction extensions suited for specific purposes, or even processors having radically different architectures. To choose the right architecture for a given use, current design flows make extensive use of simulation. Dynamic binary translation has been advocated to accelerate the simulation of software in this context. Unfortunately, developing dynamic binary translators is a tedious work, so, due to the wide variety of instruction set architectures, automating this task is a must. In this paper, we propose an innovative design flow to automatically generate dynamic binary translators from high level architectural descriptions of both the target processor and the host processor, and outline the challenges that this flow incurs.
Frédéric Pétrot received the DEA (master) and PhD degree in Computer Science from Université Pierre et Marie Curie (Paris VI), Paris, France, in respectively 1990 and 1994. From 1995 to 2004, he was assistant professor, and contributed actively to the Alliance VLSI CAD System. F. Pétrot joined TIMA in September 2004, and holds a professor position at the Grenoble Institute of Technology, France, where, since 2007, he heads the System Level Synthesis group. His main research interests are in system level design of integrated systems, and include computer aided design of digital system, architecture and software for multiprocessor systems on chip.
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