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Prof. Frédéric Rousseau, TIMA, France


Lightweight task migration in multi-tiled architecture - Communication consistency


Multi-tiled architecture has come into play as a feasible and efficient architectural solution for MPSoC. Each tile contains at least one processor, one memory and associated peripherals with distributed network devices; the later provide necessary primitives for inter-tile communications on such a fully distributed memory architecture.
We present a solution for a lightweight task migration on such architectures. Task code replication is used wisely to achieve migration and to be deployed on simple embedded operating systems. We target data flow applications with a thorough emphasis on solving communication inconsistency issues. Applications on multi-tile architectures highlight the effectiveness of our approach. Beside the fact that this solution enables the system to remap its task at runtime, it indeed contributes to increasing reliability of the system by enabling responsiveness to temperature increase, or workload imbalance.


Pr Frédéric Rousseau received the Engineer degree in computer science and electrical engineering from the University of Grenoble in 1991 and a Ph.D. in computer science in 1997 from the University of Evry - France. He has hold an assistant professor position at the University of Grenoble since October 1999 and a professor position since 2007. He is researcher in TIMA lab. His research interest concerns Systems on Chip design and architecture, prototyping of hardware/software systems and high-level synthesis for embedded systems.

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