14th International Forum on Embedded MPSoC and Multicore
July 7-11, 2014, Margaux, France
Dr. Pierre G. Paulin, Synopsys, Canada
Parallel Processing Challenges in Embedded Vision Subsystems
We review the computation characteristics of the most common kernels in a vision application pipeline: from image scaling to feature extraction, classification, object tracking, high-level processing and decision making. We study the different types of data- and task-level parallelism for each of these tasks, as well as the data and control dependencies. From these, we define the computing requirements for a parallel processing vision platform. We review a pedestrian detection case study to illustrate some of these concepts, and present results for a multi-processor reference platform developed at Synopsys which is based on the HOG algorithm.
Dr. Pierre G. Paulin is director of R&D for Embedded Vision Subsystems at Synopsys, Canada. He is responsible for the application development, architecture design and S/W programming tools for parallel vision subsystems. Prior to this, he was Director of System-on-Chip Platform Automation at STMicroelectronics in Canada, working on platform programming tools for multi-processor systems-on-a-chip, targeting video codec and embedded vision applications. This followed his previous positions as director of Embedded Systems Technologies for STMicroelectronics in Grenoble, France, and manager of Embedded Software and High-level synthesis tools with Nortel Networks in Canada. His research interests include embedded vision, multi-processor systems, and system-level design. He obtained a Ph.D. from Carleton University, Ottawa, and B.Sc. and M.Sc. degrees from Laval University, Quebec. He won the best presentation award at the Design Automation Conference in 1986, and won the best paper award at ISSS-Codes in 2004. He is a member of the IEEE.
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