14th International Forum on Embedded MPSoC and Multicore
July 7-11, 2014, Margaux, France
Prof. Yuan Xie, Penn State/AMD Research, USA
Reliability-Aware Cross-Point Resistive Memory Design
Resistive memory has become a promising technology for future storage-class and working-class memory. This talk will give a brief introduction on ReRAM and describe a reliability-aware cross-point ReRAM array design.
Yuan Xie is a professor at the Pennsylvania State University since 2003. He received his B.S. degree from Tsinghua University, and his M.S. and Ph.D. degrees from Electrical Engineering Department, Princeton University. Prior to joining Penn State, he worked as an Advisory Engineer for IBM Microelectronics Division's Worldwide Design Center. He also helped start AMD research China lab in 2012. For more information please see http://www.cse.psu.edu/~yuanxie/
* If you wish to modify any information or update your photo, please contact the web firstname.lastname@example.org