Slides available here!

Speaker:

Dr. Kees Vissers, Xilinx, USA

Title:

Integrating multiple memory technologies for Key Value Store implementations on FPGAs

Abstract:

There is a drastic change in the memory hierarchy of computer systems coming. Classical Disk is already replaced by Solid State Disk, based on flash technology. The novel integration of several memory technologies provide a disruptive opportunity for systems including database systems. We will show that application specific memory systems significantly outperform classical memory systems with multi-threaded multi-core compute. In this talk we will present the results of an actual implementation of Memcached at sustained 10Gbps line rate, with Terabytes of storage. Memcached contains an implementation of a Key-Value store, the basic technology for databases. This implementation has been completely written in C/C++ using Xilinx' Vivado High Level Synthesis. The implementation leverages many memory technologies, including on FPGA BRAM, external DRAM, attached banks of Flash Storage, and external Host memory over PCIe or a Cache Coherent Interface. We will show actual measurements of the implementation, including low-latency, and at least a 38x performance/Watt improvement over the best multicore CPU server implementations. We will show the complete system integrated in a high-end cache coherent platform with Terabytes of Host memory. We will show in detail the benefits of the FPGA implementation and compare this to CPU implementations. We will show the considerations in memory bandwidth and storage for scaling this to guaranteed line rates of 40Gb/s and 100Gb/s with Terabytes of storage on current FPGAs.

Bio:

Kees Vissers graduated from Delft University in the Netherlands. He worked at Philips Research in Eindhoven, the Netherlands, for many years. The work included Digital Video system design, HW-SW co-design, VLIW processor design and dedicated video processors. He was a visiting industrial fellow at Carnegie Mellon University, where he worked on early High Level Synthesis tools. He was a visiting industrial fellow at UC Berkeley where he worked on several models of computation and dataflow computing. He was a director of architecture at Trimedia, and CTO at Chameleon Systems. He was a Booard member of Beecube. Today he is heading a team of researchers at Xilinx. The research topics include next generation programming environments for processors and FPGA fabric, high-performance video systems, wireless applications and new datacenter applications. He has been instrumental in the architecture of Zynq and MPSoC and the High-Level Synthesis technology. He is continuously driving new architectures and programming environments.



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