Slides available here!

Speaker:

Prof. Sorin Cotofana, Delft University of Technology, Netherlands

Title:

Application-specific soft processor optimisation through instruction-level frequency scaling

Abstract:

Reconfigurable devices, e.g., FPGAs, enable the creation of application-specific processors which potentially enable the fast, energy-efficient execution of various applications in fields ranging from web search to video processing. However, developing an application-specific processor is still a fairly labour-intensive ad-hoc process, which requires digital design and FPGA optimization knowledge. In this presentation we introduce an application-specific processor design technique which is leveraging per-instruction logic optimisation, reconfiguration, and instruction-level frequency scaling by tailoring the clock period to precisely match the currently executing instruction logic delay. The technique builds upon: (1) profiling the application instruction stream in order to identify frequently-utilised and unused instructions, (2) removing the logic associated with the unused instructions from the processor structure, (3) optimising the remaining instructions with focus on the minimisation of the critical path delay corresponding to the most frequently utilised instructions, and (4) configuring a highly accurate frequency scaling module with the obtained processor instruction delays such that run-time instruction-level frequency scaling can be performed. We utilize the Opincaa SIMD soft processor and its corresponding software development toolchain as a discussion vehicle to demonstrate the potential performance increase provided by means of this automatic optimisation technique.

Bio:

Sorin D. COTOFANA received the M.Sc. degree in Computer Science from the "Politechnica" University of Bucharest, Romania, and the Ph.D. degree in Electrical Engineering from Delft University of Technology, The Netherlands. He is currently an Associate Professor with the Electrical Engineering, Mathematics and Computer Science Faculty, Delft University of Technology, Delft, the Netherlands. His current research is focussed on: (i) the design and implementation of dependable/reliable systems out of unpredictable/unreliable components; (ii) ageing assessment/prediction and lifetime reliability aware resource management; and (iii) unconventional computation paradigms and computation with emerging nano-devices. He (co-)authored 37 journal, 177 international conference, and 38 local conferences and workshops papers. He received 12 international conferences best paper awards, e.g., 2012 IEEE Conference on Nanotechnology, 2012 ACM/IEEE International Symposium on Nanoscale Architectures, 2005 IEEE Conference on Nanotechnology, 2001 International Conference on Computer Design; He is currently Senior Editor for IEEE Transactions on Nanothechnology and Associate Editor for Nano Communication Networks journals, Steering Committee member for IEEE Transactions Transactions on Multi-Scale Computing Systems, and has been actively involved in the organisation of many international conferences. He is a HiPEAC member, a senior IEEE member (Circuits and System Society (CASS) and Computer Society), Chair of the GIga-Nano IEEE CASS Technical Committee, and IEEE Nano Council CASS representative.



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