Slides available here!


Speaker:

Hironori Kasahara, Waseda University, Japan

Title:

Automatic Paralleling of Automobile Engine Control Programs on Multicores

Abstract:

This talk introduces the automatic parallelization method of automobile engine control programs implemented in OSCAR parallelizing compiler. It includes the conversion of a macrotask graph with control dependence edges to a macrotask graph with only data dependence edges to apply static task scheduling to avoid the relatively large overhead of dynamic scheduling considering fine grain tasks composed of basic blocks. It also includes the inline expansion and the duplication of if statements to reduce the critical path length of the macrotask graph to increase the parallelism. The developed method can be applied both for hand-written codes and model based designed codes. The compiler can support various multicores such as 1.95 times speedup for a basic control code on two cores V850 multicore and 1.54 times speedup for a Crankshaft Program on two cores of SH based RPX. The compiler will be available from OSCAR Technology.

Bio:

Hironori Kasahara received a Ph.D. in electrical engineering from Waseda University, Tokyo in 1985. He has been a professor of Department of Computer Science and Engineering since 1997 and a director of the Advanced Multicore Processor Research Institute since 2004, Waseda University via an assistant professor in 1986 and an associate professor in 1988. He was a visiting scholar at University of California, Berkeley and University of Illinois at Urbana-Champaign's Center for Supercomputing R&D. He received IEEE Computer Society Golden Core Member Award, IPSJ Fellow Award, IFAC World Congress Young Author Prize, and a Science and Technology Prize in the commendation by Minister of Education, Culture, Sports, Science, and Technology. He led four Japanese national projects on parallelizing compilers, multicores and green computing supported by METI/NEDO. He has served as a chair or a member of 220 government and society committees including a chair of the IEEE Computer Society Multicore STC, a member of the IEEE Computer Society Board of Governors, an associate editor of IEEE Trans. Computers, and MEXT Earth Simulator and K supercomputer committees. His works have been presented as more than 210 papers, 130 invited talks, 27 patents and 510 newspapers and web articles.



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