Slides available here!

Speaker:

Tsuyoshi Isshiki, Tokyo Institute of Technology, Japan

Title:

ASIP Design Methodology on C2RTL Framework

Abstract:

C2RTL Framework is a new (patented) C-based design framework for directly describing all kinds of RTL structures and also serving as fast simulation models, implemented entirely on ANSI-C compliant programming without any built-in extensions and libraries. In this talk, a design case of JPEG encoder ASIP is used to highlight the strength of our C2RTL framework, where the designer starts with a baseline processor C model and a reference JPEG encoder software. After software profiling on the baseline processor, hot spot SW functions (color conversion, 8-point DCT, quantization, Huffman coding) are "moved" inside the processor as custom HW modules activated by custom instructions, all of which are described in C, then converted directly into RTL description by the C2RTL tool. The entire effort took only 2 weeks (1 person), where the achieved speedup is 59.48x (over SW execution on baseline processor), gate count of approx. 111k gates and throughput of 3.356 cycles/pixel is comparable with that of the commercially available JPEG encoder IP.

Bio:

Tsuyoshi Isshiki has received B.E. and M.E. degrees from Tokyo Institute of Technology in 1990 and 1992, respectively, and received PhD in Computer Engineering from University of California at Santa Cruz in 1996. He is currently a professor at Tokyo Institute of Technology, Global Scientific Information and Computing Center. His research interests include multimedia SoC designs, Multiprocessor SoC design methodology and its design tools.



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