Slides available here!


Speaker:

Yankin Tanurhan, Synopsys, USA

Title:

Taking configurability and programmability to the next level for embedded vision processing

Abstract:

The Synopsys Embedded Vision Processor is designed to support a wide range of vision application classes with extensive architecture scalability. The configurability options of the EV processor include:

- Number of vision-optimized wide SIMD cores

- Configuration of each core with coherent L1 instruction and data caches, closely coupled vector data memory, and optional floating point unit.

- Configurable on-chip shared low-latency memory, with multiple banks and full arbitration

- Vision optimized DMA with scalable bandwidth, number of channels and ports

- Configurable CNN (convolution neural network) accelerator.

These configuration options and processor scalability are fully supported by high-level, standards-based programming models, which integrate the Khronos OpenVX runtime and the OpenCL C kernel language.

Bio:

Dr. Yankin Tanurhan is Vice President of Engineering for DesignWare Processor Cores, IP Subsystems and Non-Volatile Memory at Synopsys. He leads the low power and high performance ARC and EV embedded Processor developments targeted from Mobile, IoT, Embedded Vision, Digital Home, Automotive/Industrial, Security to Storage markets, ASIP tool development with products like ASIP Designer and Programmer, IP Subsystems products like Sensor Fusion, Audio, Vision and Security Subsystems and CMOS based Non Volatile IP development. Before joining Synopsys, Dr. Tanurhan was Vice President and General Manager of Virage Logic's Processors, SoC Infrastructure and NVM Solutions business units. Virage Logic was acquired by Synopsys in September 2010. Prior to this, Dr. Tanurhan served as Vice President of Actel's Advanced Applications and System Solutions, where he lead Actel's new architecture design, IP and MPU business units, system and hardware tools and product validation departments. He was also responsible for leading Actel's embedded FPGA, embedded processor and DSP activities.

Previously in his research career he served as the director of the department of electronic systems and microsystems of FZI (Forschungszentrum Informatik) a German contract research institute attached to the University of Karlsruhe. Dr. Tanurhan has authored more than 100 papers in refereed publications. He holds a B.S. and M.S. in Electrical and Computer Engineering from Rheinisch Westfaellische Technische Hochschule (RWTH) in Aachen, Germany and a Dr. Ing. degree summa cum laude in Electrical Engineering from the University of Karlsruhe (TH) in Karlsruhe, Germany.



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