Frederic Rousseau
TIMA, France
Lockality: a Scalable Synchronization Lock for MPSoCs
Download SlidesAbstract
Shared memory MPSoCs tend to integrate more and more computing units each generation. Having efficient scalable synchronization mechanisms is mandatory to benefit from the high parallelism of modern MPSoCs. In this talk we propose an innovative hardware support for synchronization locks. First of all, a non-intrusive measurement tool-chain allows us to prove a fundamental hypothesis for the optimization of the lock mechanism: although during the run time a lock may be used by various cores belonging to different clusters, it is often reused by the last core which has released it. Based on this observation, we propose an innovative decentralized solution to manage dynamic re-homing of locks in dedicated memory close to the last access-granted core, thus reducing overall access latency and network traffic in case of reuse of the lock by the same cluster. This talk presents our solution and its performance evaluation on a characteristic MPSoC. Experiment results expose large gains at low level (physical lock acquisition) as well as at the application level.
Biography
Pr Frédéric Rousseau received the Engineer degree in computer science and electrical engineering from the University of Grenoble in 1991 and a Ph.D. in computer science in 1997 from the University of Evry – France. He has hold an assistant professor position at the University of Grenoble since October 1999 and a professor position since 2007. He is researcher in TIMA lab. His research interest concerns Multi-Processor Systems-on-Chip design and architecture, prototyping of hardware/software systems, including reconfigurable systems and high-level synthesis for embedded systems.