Yoshinori Takeuchi
Kindai University, Japan
Challenges for processor instruction extension in MPSoC Era
Download SlidesAbstract
In MPSoC era, many kinds of specific processor cores are used for each target application. Therefore, configurable processor is one of solutions for new processor. However, design cost of processor core is not low enough even if we design processor by using configurable processor design environment. In this talk, we will explain our current approach to reduce processor design cost for configurable processor cores.
Biography
He is a Professor of Department of Electric and Electronic Engineering at Kindai University. He received his B.E., M.E. and Dr. Eng. degrees from Tokyo Institute of Technology in 1987, 1989 and 1992, respectively. From 1996, he has been with the Osaka University. He was a visiting scholar in University of California, Irvine from 2006 to 2007. His research interests include System Level Design, VLSI design and VLSI CAD. He is a member of ACM, and Computer, CAS, SSC, and SP Society of IEEE.