Andreas Herkersdorf

TU Munich, Germany

Smart 6G Edge Node Interfaces

Abstract

The formulated targets for improving future 6G network infrastructure over current 5G networks, such as less than 1 ms round trip latency, 10 Gb/s user experience data rate and two orders of magnitude better energy efficiency, require innovative new concepts and architectures on both the wireless as well as wire-based network infrastructure. This mini-keynote presents ongoing work and results with the focus on the following aspects of wire-based 6G RAN / Edge nodes: Ultra-low latency forwarding and reflex-like redirection of selected IP packet flows among 6G nodes under control of a federated learning-based control layer in order to ensure stringent real time and QoS requirements for high priority traffic / applications. Migrating the execution of specific applications among different Edge nodes (or relocating applications from Network Core to Edge nodes) for the sake of shorter end-to-end loops with user devices. Last but not least, dynamic (micro-second range) power and resource management among the heterogeneous compute and memory components of 6G Edge nodes triggered by varying traffic characteristics in the Data Link and gearbox PHY layers. This research is conducted as part of the 6G Future Lab Bavaria project (funded by the Bavarian Ministry of Economic Affairs, Regional Development and Energy) and the 6G-life research hub between TU Dresden and the TU Munich (funded by the German Federal Ministry of Education and Research).

Biography

Andreas Herkersdorf is a professor and Head of the Computer Engineering Department at Technical University of Munich (TUM). He received a Dr. degree from ETH Zurich, Switzerland, in 1991. Between 1988 and 2003, he has been in technical and management positions with the IBM Research Laboratory in Rüschlikon, Switzerland. Since 2003, Dr. Herkersdorf is the Chair Professor of Integrated Systems at TUM. He is a senior member of the IEEE, member of National Academy of Science and Engineering (acatech) and serves as editor for Springer and De Gruyter journals for design automation and information technology. His research interests include application-specific multi-processor architectures, IP network processing, Network on Chip and self-adaptive fault-tolerant computing. Andreas Herkersdorf is a professor and Head of the Computer Engineering Department at Technical University of Munich (TUM). He received a Dr. degree from ETH Zurich, Switzerland, in 1991. Between 1988 and 2003, he has been in technical and management positions with the IBM Research Laboratory in Rüschlikon, Switzerland. Since 2003, Dr. Herkersdorf is the Chair Professor of Integrated Systems at TUM. He is a senior member of the IEEE, member of National Academy of Science and Engineering (acatech) and serves as editor for Springer and De Gruyter journals for design automation and information technology. His research interests include application-specific multi-processor architectures, IP network processing, Network on Chip and self-adaptive fault-tolerant computing.

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