Fumio Arakawa

The University of Tokyo, Japan

Development of edge-AI accelerator in 2-nm Technology

Abstract

I will introduce a project, started last April, to develop an edge-AI accelerator in 2-nm Technology. The project members are Leading-edge Semiconductor Technology Center (LSTC) and Tenstorrent inc., and the LSTC members are The National Institute of Advanced Industrial Science and Technology (AIST), Rapidus Corporation., and the University of Tokyo. Potential use cases of the edge-AI accelerator include factory automation, automotive, retailing, healthcare, and robot assistant. Such applications use Transformer with a large language model (LLM). With developing AI-accelerator architecture, accelerator and CPU chips, and software development kit, we will establish a design technique in 2-nm technology based on popular open-source Ips and environments.

Biography

Fumio Arakawa is a designated researcher of d.lab at the University of Tokyo, and an invited professor of Graduate School of Informatics at Nagoya University. His research interests include architecture and micro-architecture of low-power and high-performance processors. He has founded an R&D and consulting company, Famer Systems, Inc. to contribute to industries with his R&D experience of Hitachi and Renesas Electronics. He is the organizing committee chair of the Cool Chips conference series. He served as a Guest Editor of IEEE Micro for seven times, and TPC members of conferences including ISSCC, VLSI Circuits Symposium, A-SSCC, and MCSoC. He has a Ph.D. in electrical engineering from the University of Tokyo. He is a member of IEEE and IEICE.