University of Florida
System-Level Design of Resilient Multiprocessor System-on-Chip
Technology scaling due to decreasing size of transistors has led the transition from single superscalar processors to multiprocessor system on chip (MPSoC) in a wide range of critical cyber-physical systems (CPS), including unmanned ground and air vehicles and SmartGrid, and thereby critically depend on the reliability and dependability of micro-and nano-electronic components. While software faults used to be the main source of concern, for example in automotive electronic systems, digital hardware has become a main source of faults since about 2010. This is due in particular because of feature size of integrated circuits approaching 10 nm horizontally and single layers of atoms vertically. As result, the long-term dependable service of multi-core processor in safety-critical applications is no longer guaranteed. Resilience-aware computing aims at designing and deploying systems that can withstand the successful exploitation of vulnerabilities and continue to meet mission goals. In the effort to reduce development cost and time-to-market, MPSoC designs are trending towards a heavy utilization of third-party Intellectual Property (IP) cores. Besides the challenges of correct integration of components from different vendor, this outsourcing of IP design to a third-party opens the door for potential introduction of malicious components. Traditional fault tolerant systems that uses redundancy based on probability of component failure fall short to address future challenges, due to the difficulty of verifying the probability of attack and successful exploitation of system vulnerability.
This talk addresses system-level-design of secured MPSoC through a tighter integration of user-specified resiliency requirements and objectives in the hardware/software design process. The talk discusses generic models and tools to capture and quantify resiliency in MPSoC, along with protocols that automatically generate the hardware/software security infrastructure.
Prof. Bobda is with the University of Florida as Professor of Computer Engineering, leader of the lab smart systems and Associate ECE Chair for Education.Prof. Christophe Bobda is an expert in embedded systems, reconfigurable systems, and system-on-chip with applications in IoT, cybersecurity and is-situ image analysis, particularly hardware/software reconfigurable architectures for acceleration of video processing applications, at the edged and in the cloud. Professor Bobda is Senior Member of the ACM and IEEE. He is also in the program committee of several conferences like DAC, CODES+ISSS, FCCM, FPL and FPT and was ACM ACM Distinguished Speaker from 2016 – 2020. Dr. Bobda has authored more than 200 journal and conference publications in computer architecture, embedded systems, system-on-chip, embedded imaging, robotics and cybersecurity. He received multiple conference awards, including the FCCM Best Short Paper and the SBCCI Test of Time Awards.
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