For further information, please contact the General chair: Pierre-Emmanuel Gaillardon
Keio University, Japan
Accelerating Anomaly Detection Algorithms on FPGA-Based High-Speed NICs
Anomaly detection on high-speed NICs (Network Interface Cards) can be used for network security, trend analysis, and surveillance. Especially, change-point detection is used to look for change in a probability distribution of time series, while outlier detection is used to look for entity being away from the mean of a probability distribution. We have been accelerating some outlier detection algorithms and change-point detection algorithms using FPGA-based NICs that have four 10GbE interfaces. In this talk, we will discuss these algorithms and introduce the FPGA-based high-throughput anomaly detectors. Their applications in industry fields are also introduced.
Hiroki Matsutani received the BA, ME, and PhD degrees from Keio University in 2004, 2006, and 2008, respectively. He is currently an associate professor in the Department of Information and Computer Science, Keio University. From 2009 to 2011, he was a research fellow in the Graduate School of Information Science and Technology, The University of Tokyo, and awarded a Research Fellowship of the Japan Society for the Promotion of Science (JSPS) for Young Scientists (SPD). His research interests include the areas of computer architecture, interconnection networks, and big data processing.