For further information, please contact the General chair: Tohru Ishihara
Seoul National University, Korea
Algorithms and Architectures for Efficient Neural Processing
It has been more than 70 years since the first electronic computer was built based on von Neumann architecture, and it is surprising to see that most of the computers that we are using currently are still based on the same architecture. Recent progresses in deep neural networks as a new computing paradigm demonstrated performance (in terms of accuracy) much higher than that of the conventional approaches and even beyond the capability of human brain in recognition, mining, and synthesis applications. However, they are still heavily relying on von Neumann architecture and, in terms of energy efficiency, it is hard to say that they are very well exploiting their potential. Many researchers are working on resolving this issue through various approaches including model reduction, architectural optimization, bit-width reduction, and analog implementation. In this talk, I will present the techniques that we are developing for those approaches. They include model transformation called Network Recasting, computation pruning and early negative detection architecture called ComPEND, techniques for low precision computing, and analog computing with memory array. I will also introduce briefly the research activities currently going on in the Neural Processing Research Center at Seoul National University.
Bio: Kiyoung Choi is a professor of Electrical and Computer Engineering at Seoul National University. He received B.S. degree in electronics engineering from Seoul National University in 1978, M.S. degree in electrical and electronics engineering from KAIST in 1980, and Ph.D. degree in electrical engineering from Stanford University in 1989. He worked for Cadence Design Systems from 1989 to 1991. He is the director of Neural Processing Research Center at Seoul National University and President Elect of the Institute of Semiconductor Engineers. He is also an IEEE Fellow. His research interests are in computer architecture, embedded systems design, neuromorphic computing, and design automation.