For further information, please contact the General chair: Pierre-Emmanuel Gaillardon
IBM Research - Tokyo, Japan
NVM neuromorphic core with on-chip learning capability
Von Neumann architecture has driven exponential improvements in computing system performance for more than five decades. However, as device dimension is getting closer to physical limit and 'Von Neumann bottleneck' has become problematic, hardware processors for 'neuromorphic computing' are gaining significant interest and expected to play a key role in future computing systems. Dense non-volatile memory array is one of the most attractive solutions for neuromorphic computing architecture since the device density can be potentially as high as 4F2 area per memory cell, analog synaptic weights can be stored into one cell and parallel matrix-vector multiplication can be also implemented efficiently in an analog fashion. In this talk, spike-based neuromorphic core using phase change memory as synapses will be mainly discussed.
Masatoshi Ishii is a Research Staff Member at IBM Research - Tokyo. He joined IBM Japan in 1998, where he has been engaged in broad electrical engineering fields including printed circuit board development for ThinkPad, signal and power integrity simulation for memory interfaces and full custom circuit design for SRAM and CAM macros. His current research interests include neuromorphic chip design and hardware-aware neural network simulator development.