For further information, please contact the General chair: Pierre-Emmanuel Gaillardon
Hong Kong University of Science and Technology, Hong Kong
Static and Dynamic Hybrid Cache Management for CPU-FPGA Platforms
Heterogeneous computing brings the opportunity to catch up with the increasing demand of modern computing tasks, where the CPU-FPGA platform is promising due to the high flexibility of FPGA, which enables customization for various computing tasks to boost the performance and energy efficiency. Nowadays, shared coherent cache based CPU-FPGA systems (like Intel HARP and IBM POWER8 with CAPI) are proposed to enhance the communication efficiency between CPU and FPGA and simplify the programming model. In such systems, a coherent cache is attached to FPGA for the quick memory access from FPGA, whose behavior dominates the performance of the FPGA and the entire system. The FPGA execution tends to encounter severe cache misses on the FPGA cache, which degrades the FPGA acceleration benefits. To solve this problem, we propose CAMAS, a static and dynamic coordinated cache management approach to reduce the FPGA cache miss and enhance the AFU performance. In the static step, reuse distance analysis is applied to the memory access trace from FPGA to characterize the accessed cachelines into different locality levels. Then a dynamic control with a learning mechanism performs bypassing or caching for the returned cachelines at cache miss according to the corresponding type. The experiments with simulator and also real Harp platform implementation demonstrate a significant performance improvement using CAMAS.
Dr. Wei Zhang received her PhD from Princeton University with Wu Prize. She is currently an Associate Professor with the Department of Electronic and Computer Engineering, the Hong Kong University of Science and Technology, where she established the Reconfigurable System Laboratory. She was an Assistant Professor with the School of Computer Engineering, Nanyang Technological University, Singapore, from 2010 to 2013. Dr. Zhang currently serves as an Area Editor of Reconfigurable Computing of the ACM Transactions on Embedded Computing Systems (TECS), Associate Editor of the IEEE Transaction on Very Large Scale Integration (TVLSI) Systems, and Associate Editor of the ACM Journal on Emerging Technologies in Computing Systems (JETC). She also serves on many organization committees and technical program committees, including DAC, ICCAD, ASPDAC, CASES, FPL, etc. She authored over 80 technical papers in referred international journals and conferences, and authored three book chapters. Her current research interests include reconfigurable system, power and thermal management, embedded system security, and emerging technologies.