Marcello Coppola received the Laurea degree in computer science from the Pisa University, in 1992. Previously, he was in the architecture group at the INMOS Bristol (UK). Currently, he is the Grenoble AST lab manager within STMicroelectronics. His current research interests are discrete event simulation, SoC modeling and architecture, programming languages, RTOS, concurrent programming and software/hardware engineering tools . He is responsible for R&D programs in real-time hardware, and software developement techniques.He is contributing to SystemC standardization. He has published several papers in the areas of system modeling. He has chaired international conferences on SoC design and helped to organize several others. He is a member of OSCI and is contributing to MEDEA+ roadmap.