From 1984 to 1988 he was with CSELT Laboratories (Torino, Italy), where he was involved in the ESPRIT~802 CVS project that developed a complete high-level synthesis system.

In 1988 he joined the Department of Electrical Engineering and Computer Science of the University of California at Berkeley, where he worked on logic synthesis and testing of synchronous and asynchronous circuits. In 1992 he received his Ph.D. in Electrical Engineering and Computer Science from the University of California at Berkeley.

Between 1993 and 2000 he was the architect of the POLIS project (a cooperation between U.C. Berkeley, Cadence Design Systems, Magneti Marelli and Politecnico di Torino), developing a complete hardare/software co-design environment for control-dominated embedded systems. POLIS is one of the basic technologies behind the Cierto VCC system-level design and IP integration tool by Cadence Design Systems. Since 2001 he has been part of the Metropolis project, a continuation to POLIS.

Between 1997 and 2000 he participated in the ESPRIT 25443 COSY project, developing a methodology, partially based on VCC, for software synthesis and performance analysis for embedded systems.

Since 1994 he has been a research scientist at Cadence Berkeley Laboratories.

Between 1993 and 1998 he was an Assistant Professor with the Department of Electronics of Politecnico di Torino.

Between 1998 and 2001 he was an Associate Professor with the Department of Electrical, Management and Mechanical Engineering (DIEGM) of the University of Udine,  Italy.

Since 2001 he has been an Associate Professor with the Department of Electronics of Politecnico di Torino, Italy.

His research interests include synthesis and testing of asynchronous circuits, and the concurrent design of mixed hardware and software embedded systems.

Dr. Lavagno is a co-author of two books on asynchronous circuit design and one on hardware/software co-design of embedded systems. He has published over 100 journal and conference papers.

In 1991 he received the Best Paper award at the Design Automation  Conference in San Francisco, CA. He has served on the technical committees of several international conferences in his field (namely the Design Automation Conference, where he was technical program chair in 2001-2003,  the International Conference on Computer Aided  Design, the International Conference on Computer Design, and the conference on Design Automation and Test in Europe). He has also served as
technical committee member or chair of several workshops and symposia (for example, the International Symposium on Asynchronous Circuits and Systems, the International Workshop on Hardware-Software Co-Design, the International Workshop on Logic Synthesis). He has been a consultant for various EDA companies, such as Synopsys and Cadence.