Technical sessions to present strategic directions and state-of-the-art research. The program will be made of in-depth technology challenge presentations and educational panels made of short keynotes followed by discussions. All the presentations will be made by CTO-level speakers. The sessions will cover:

• MPSoC Architecture
  • On-chip interconnect for heterogeneous and highly parallel MPSoC
  • Memory architecture
  • Nanotechnologies
  • Networking
• MPSoC Applications Platforms
  • Killer applications for MPSoC
  • MPSoC platforms
  • HW vs. SW reconfiguration
  • Mixed signal
• SW Programming
• Embedded RTOS
• Flexible CPU
• Parallel programming models
• MPSoC Design Methodologies
• Concurrent design
• HW-SW debug & verification
• Testing
• Case studies
• HW/SW interfaces codesign.