Takashi Miyamori, Toshiba Corporation, Japan


Low Power Heterogeneous Multi- & Many-Core SoCs for Multimedia Applications


We have developed power efficient heterogeneous multi-core and many-core SoCs for embedded multimedia applications such as image recognition, image processing, and video codecs. These applications pose a challenge of achieving high processing performance, more than several hundred GOPS, with low power consumption. Heterogeneous multi- or many-core architecture with hardware and reconfigurable accelerators can exploit various types of parallelism effectively and provide good energy efficiency. In this presentation, we will introduce the heterogeneous multi- and many-core SoC architectures and their performance evaluation results.


Takashi Miyamori received the B.S. and M.S. degrees in electrical engineering from Keio University, Japan, in 1985 and 1987, respectively. In 1987, he joined Toshiba Corporation, where he was engaged in the research and development of microprocessors. He is currently a Chief Specialist and working on the development of configurable processor cores, media processors, image signal processing processors, and multi-core processors.

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