Masaitsu Nakajima, Panasonic Corporation, Japan


Multi-Media Acceleration for Triadic multithreaded processor “Ashura”


Last year, we introduced the triadic multithreaded processor “Ashura” as a key component for digital consumer electronic SOCs. “Ashura” adopts the combined multithreading technology with SMT, FGMT, and CGMT, and realizes very high throughput performance and support real time multi media operation. In this talk, two key enhancements, 1) 128bit wide SIMD instruction extensions, 2) scalable SMP multi core extension with smart snooping technique, for multi-media acceleration are introduced.


Dr. Masaitsu Nakajima received B.S. degree from Tokyo Institute of Technology in 1985 and joined Matsushita Electric Industrial Co., Ltd., (currently Panasonic Corporation), where He had been working on the development of 64bit RISC and a superscalar processor for parallel computer system, the ASICs for 3DO interactive multi-media player, Panasonic's proprietary 32bit embedded CPU AM33 series CPU core, and IPP, Instruction Parallel Processor, for UniPhier Platform. He received Ph.D. degree from Kobe University in 2007. He is interested in low power and high performance processor architecture, processor implementation, circuit design and design methodology. Currently, he is a general manager of processor core technology group, Digital Core Development Center, Panasonic and he takes responsibility for general purpose CPUs, media processors, low power techniques for UniPhier based SoCs.

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