Erdem Ozcan, STMicroelectronics, Canada


Dynamic yet analyzable dataflow models for programming manycore SW/HW platforms


Parallel implementation of next generation streaming applications on manycore platforms is a major challenge. Dataflow programming models provide a suitable abstraction for capturing such applications as a pipeline of parallel taks. They can also provide programmers with powerful analysis tools to map the tasks of the application to parallel HW/SW resources and to verify their liveness and boundedness. On the other hand, the amount of analysis which can be supported by the programming model is inversely proportional to its expressive power. This raises a compelling trade-off between the expressivity and the analyzability of the programming model. This talk will showcase the kind of expressivity that is needed by a state-of-the-art video codec and will discuss how such a trade-off can be defined between a completely static or completely dynamic dataflow model.


Erdem Ozcan received a Ph.D. in Computer Science from Institut National Polytechnique de Grenoble in 2007. He also holds an M.Sc. degree in Microelectronics Design from Université Joseph Fourier and a B.Sc. degree in Telecommunications Engineering from Institut National Polytechnique de Grenoble. Erdem joined STMicroelectronics in 2003. He is currently a senior R&D engineer in the System-on-Chip Platform Automation Group. His research interest include component-based software design, parallel programming models and tools for manycore platforms and embedded middleware and operating systems.

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