Yasuhiro Tawara, Renesas Electronics Corporation, Japan


Domain specific programming approach for a heterogeneous multicore SoC


Today's battery-driven SoC takes advantage of heterogeneous multicore to satisfy both high performance and low power consumption. It still requires expertise to find out parallelism in a target application in order to exploit performance of a heterogeneous multicore SoC. We think that building a kind of a domain specific language using a functional programming would make finding parallelism in an application easier. There is also a mechanism to map detected parallelism to specific hardware. This talk will introduce the overview of capability to build a domain specific language using functional programming and mechanism to map parallelism to hardware.


Yasuhiro Tawara is a senior engineer at Renesas Electronics Corporation. He received BS degree in Mathematics at Waseda University and joined Hitachi, Ltd. He designed an optimizing compiler and a part of the SuperH RISC engine at Hitachi, Ltd. He received MS degree in Computer Science at Stanford University. He engaged in development of integrated design environments and compilers in Hitachi, Ltd. He joined Renesas Technology Corp. in 2003 when it was spun out of both Mitsubishi Electric Corp. and Hitachi, Ltd. He joined Renesas Electronics Corporation into which NEC Electronics Corporation and Renesas Technology Corp. were merged in 2010. He has been engaged in performance evaluation of processors, system level verification and multicore operating system development. His current interests are operating systems, load balancing algorithm, low-power system design, and heterogeneous multicore architecture.

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