16th International Forum on MPSoC for Software-defined Hardware
July 11-15, 2016, Nara Hotel, Nara, Japan
Slides available here!
Speaker:
Akihiko Shinya, NTT Nanophotonics Center, Japan
Title:
Nanophotonics for low-latency optical pass gate logic circuit
Abstract:
The processing speed of electronic circuits is greatly affected by propagation delay due to resistance (R) and capacitance (C) in the wiring path. In addition, most of the energy is lost in the electrical communications for charging or discharging the path. On the other hand, there is no such restriction in optical communications. In this talk, I will describe a new technique for signal processing at the speed of light. We adopt nanophotonics technology on a chip to replace the critical path in electronics with optical pass gates. The circuit is conceptually similar to pass transistor logic in electronics, but the configuration is optimized for optics so that the calculation can be done simply by propagating the light through the electrically controlled optical pass gates. This means that the calculation speed is determined by the light traveling time without RC-limitations in the path. In my talk, I'll focus on nanophotonics that enable us to minimize the optical path length and boost the calculation speed owing to tight light confinement effect. This wavelength-scale photonic integration technology is promising for dense photonic networks on processor chips. This work was supported by CREST, JST.
Bio:
Senior Research Scientist, Supervisor, NTT Basic Research Laboratories. He received the B.E., M.E., and Ph.D. degrees in electrical engineering from Tokushima University in 1994, 1996, and 1999, respectively. In 1999, he joined NTT basic Research Laboratories. He has been engaged in R&D of photonic crystal devices. He is a member of the Japan Society of Applied Physics and the Laser Society of Japan.
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