Slides available here!

Speaker:

Frederic Petrot, TIMA, France

Title:

On the analysis of virtual platform generated traces

Abstract:

The increasing complexity of Multiprocessor System on Chip makes the engineers' life harder as bugs and inefficiencies can have a very broad range of sources. Hardware/software interactions can be one of these sources, but due to the huge number of possible execution interleavings, reproducing the conditions of occurrence of a given error/performance issue is very difficult. One solution to this problem consists of tracing an execution for later analysis. In this presentation, we will advocate the use of traces obtained by virtual platforms, a technology largely used nowadays during system design. As opposed to traces obtained on the real hardware, virtual platforms can produce traces containing causality relations among events. This allow firstly to simplify the analysis, and secondly to avoid relying on timestamps. We propose a formalism to define these traces and use them to help identify and correct bugs on multi/many-core platforms. We take as illustrative example a method to identify the potential cache coherence violations in non-cache-coherent platforms.

Bio:

Frederic Petrot received the PhD degree in Computer Science from Universite Pierre et Marie Curie (Paris VI), Paris, France, in 1994, where has been Assistant Professor in Computer Science until September 2004. From 1989 to 1996, F. Petrot was one of the main contributors of the open source Alliance VLSI CAD system, and from 1996 to 2004, he led a team focusing on the specification, simulation and implementation of multiprocessor SoCs. He joined TIMA in September 2004, where he holds a professor position at Grenoble Institute of Technology, France. Since 2006, he heads the System Level Synthesis group of TIMA. His research interests are in multiprocessor systems on chip architectures, including circuits and software aspects, and CAD tools for the design and evaluation of hardware/software systems.



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