16th International Forum on MPSoC for Software-defined Hardware
July 11-15, 2016, Nara Hotel, Nara, Japan
Speaker:
Gabriel Loh, AMD, USA
Title:
An Interposer-based Ecosystem for MPSoCs
Abstract:
Silicon interposers are already being commercially used for the aggressive integration of multiple 3D memory stacks in high-performance systems. This provides significant amounts of memory capacity within the package with very high bandwidths and low energy-per-bit costs. However, beyond memory integration, interposer technology brings the potential for a new ecosystem that can disrupt and revolutionize the MPSoC industry. The interposer provides a substrate upon which different types of technologies from multiple parties can potentially be integrated together. Reuse of not only IP, but of actual silicon, can change how SoCs are designed and lower the barrier to entry for new SoCs, thereby possibly bringing a new growth and interest in custom SoC designs. However, there are challenges to achieve this vision, and in this talk I will cover several of the issues spanning hardware and software that require additional research efforts to realize this new interposer-based ecosystem for MPSoC design.
Bio:
Gabriel H. Loh is a Fellow Design Engineer in AMD Research, the research and advanced development lab for Advanced Micro Devices, Inc. Gabe received his Ph.D. and M.S. in computer science from Yale University, respectively, and his B.Eng. in electrical engineering from the Cooper Union. Gabe was also a tenured associate professor in the College of Computing at the Georgia Institute of Technology, a visiting researcher at Microsoft Research, and a senior researcher at Intel Corporation. He is a senior member of IEEE and distinguished scientist of the ACM, (co-)inventor on over eighty US patent applications and twenty-seven granted patents, and a recipient of the U.S. National Science Foundation Young Faculty CAREER Award. His interests include computer architecture, processor microarchitecture, memory systems, emerging technologies, 3D die stacking.
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