Slides available here!

Speaker:

Kees Vissers, Xilinx, USA

Title:

The performance of platforms for Vision based applications using Roof-line models and actual measurements

Abstract:

In this talk we will introduce the Roofline models, first introduced by Samuel Williams and David Patterson of UC Berkeley. The roofline shows the memory bound and the peak-performance bound. We will show the rooflines for current modern processors, including Xeon processors, Xeon Phi processors and the latest GPUs. We will also show how to illustrate the performance of FPGAs in this model and compare it with the other platforms. For a number of platforms we will show measured performance, and measured power consumption, achieved in close cooperation with the Irish Centre for High-end Computing (ICHEC). We will illustrate the modern Vision based machine learning algorithms.

Bio:

Kees Vissers graduated from Delft University in the Netherlands. He worked at Philips Research in Eindhoven, the Netherlands, for many years. The work included Digital Video system design, HW-SW co-design, VLIW processor design and dedicated video processors. He was a visiting industrial fellow at Carnegie Mellon University, where he worked on early High Level Synthesis tools. He was a visiting industrial fellow at UC Berkeley where he worked on several models of computation and dataflow computing. He was a director of architecture at Trimedia, and CTO at Chameleon Systems. He is recognized contributor to the Chapter on VLIW processors in the book: Computer Architecture, 5th edition: A quantitative approach by John L. Hennessy and David A. Patterson.

He was a Board member of Beecube, which is now part of National Instruments. Today he is heading a team of researchers at Xilinx, including the Xilinx European Laboratories. The research topics include next generation programming environments for processors and FPGA fabric, high-performance video systems, wireless applications and new datacenter applications. He has been instrumental in the architecture of Zynq and MPSoC and the novel programming environments, leveraging High-Level Synthesis technology. He is continuously driving new architectures and programming environments.



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