Slides available here!

Speaker:

Kiyoung Choi, Seoul National University, Korea

Title:

An Effective Approach to Processing in DRAM

Abstract:

Processing-in-memory (PIM) is resurging as a viable solution to the memory wall problem after many unsuccessful attempts in 1990s. Key reasons for the return include the ever-increasing pressure on the memory bandwidth in the big data era and the recent advancement in 3D stacking technologies that alleviate the practicality concerns in implementing PIM. However, it is still challenging to achieve both cost-effectiveness and programming efficiency through the integration of the PIM architectures into 3D stacked memory.

This talk presents an approach called 'buffered compares', a less-invasive processing-in-memory solution that can be integrated into conventional DDR3/4 DRAM with minimal changes. It is based on the observation that the multi-bank architecture in the conventional DRAM devices potentially provides a huge internal bandwidth. We place simple ALUs, one for each bank, and define a set of new DRAM commands that perform PIM (compare-n-op) operations and return the results to the host. By exploiting the potentially wide internal bandwidth inside DRAM, we not only reduce the amount of energy-inefficient processor-memory communication but also accelerate the computation through concurrent execution of the ALUs in DRAM banks.

Bio:

Kiyoung Choi is a professor of Electrical and Computer Engineering at Seoul National University. He received B.S. degree in electronics engineering from Seoul National University in 1978, M.S. degree in electrical and electronics engineering from KAIST in 1980, and Ph.D. degree in electrical engineering from Stanford University in 1989. He worked for Cadence Design Systems from 1989 to 1991. His research interests are in computer architecture, embedded systems design, low power design, neuromorphic computing, and design automation.



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