Slides available here!

Speaker:

Koji Inoue, Kyushu University, Japan

Title:

Impact of Manufacturing Variability in Power Constrained Supercomputing

Abstract:

Power efficiency is a primary concern in current and future computer systems. With the end of Dennard Scaling, it is difficult to improve processor performance without affecting power, and the leaps needed for Modern processors suffer from increasingly large power variations owing to the chip manufacturing process. These variations lead to power inhomogeneity in current systems and manifest into performance inhomogeneity in power-constrained environments, resulting in poor system performance. To tackle with this issue, in this talk, our variation-aware power budgeting scheme to maximize effective application performance is introduced.

Bio:

Koji Inoue received the B.E. and M.E. degrees in computer science from Kyushu Institute of Technology, Japan in 1994 and 1996, respectively. He received the Ph.D. degree in Department of Computer Science and Communication Engineering, Graduate School of Information Science and Electrical Engineering, Kyushu University, Japan in 2001. In 1999, he joined Halo LSI Design & Technology, Inc., NY, as a circuit designer. He is currently a professor of the Department of I&E Visionaries, Kyushu University. His research interests power-aware computing, high-performance computing, dependable processor architecture, secure computer systems, 3D microprocessor architectures, and multi/many-core architectures.



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