Slides available here!

Speaker:

Yutaka Nakamura, IBM Research Tokyo, Japan

Title:

TrueNorth : A Neurosyanptic Integrated Circuit with 1 Million Spiking Digital Neurons

Abstract:

Inspired by the brain's structure, we have developed an efficient, scalable, and flexible non-von Neumann architecture that leverages contemporary silicon technology. To demonstrate, we built TrueNorth, a 5.4-billion-transistor chip with 4096 neurosynaptic cores interconnected via an intra-chip network that integrates 1 million programmable spiking neurons and 256 million configurable synapses. Chips can be tiled in two dimensions via an inter-chip communication interface, seamlessly scaling the architecture to a cortex-like sheet of arbitrary size. The architecture is well suited to many applications that use complex neural networks in real time, for example, multi object detection and classification. With 400-pixel-by-240-pixel video input at 30 frames per second, the chip consumes 63 mW.

Bio:

Yutaka Nakamura is currently a Research Staff Member in IBM Research - Tokyo and his research interests include memory circuit design, redundancy repair, ECC, and neuromorphic chip/system. He received the B.S. degree from the Department of Mechanical Engineering, Waseda University, Tokyo, Japan, in 1985.



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