Gerd Ascheid
RWTH Aachen University, Germany
Towards a Power Efficient Embedded DNN (Deep Neural Network) ASIP
Abstract
Deep Neural Networks (DNN) are an essential component for autonomous driving. Scene segmentation, road sign detection are two examples of functions which are expected to use DNNs. Important requirements - besides low classification error rate - are real time, power efficiency, and flexibility. Power consumption is already today an issue in vehicle electronics, even more so in electrical vehicles, where electronics’ power consumption eats from range. Since algorithms continuously develop, some degree of flexibility is required. The talk discusses algorithmic and application specific processor design approaches to optimally support these requirements. With the proposed architecture, the advantage of a fully programmable processor comes at the cost of only approximately twice the power consumption. Further reductions of the power consumption can be achieved by using tailored arithmetic, e.g. 1 bit weights.
Biography
Gerd Ascheid received the Diploma and Ph.D. (Dr.-Ing.) degrees in electrical engineering (com- munication engineering) from RWTH Aachen University, Aachen, Germany. In 1988, he started as a Co-Founder and the Managing Director of Cadis Prüftechnik GmbH (CADIS), Heddesheim, Germany, which success- fully brought the system simulation tool COSSAP to the market. In 1994, CADIS was acquired by Syn- opsys Inc., Mountain View, CA, USA, a California- based EDA market leader. From 1994 to 2003, he was a Director/Senior Director with Synopsys Inc. In 2003, he joined the Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, as a Full Professor. He is also the Founder of several successful start-up companies. His current research interests include wireless communication algorithms, application-specific integrated platforms, in partic- ular, for mobile terminals and cyberphysical devices. He has co-authored three books, published numerous papers in the domain of digital communication algorithms, and ASIC implementation.