Abstract

Artificial intelligence and especially Machine Learning recently gained a lot of interest from the industry. Indeed, new generation of neural networks built with a large number of successive computing layers enables a large amount of new applications and services implemented from smart sensors to data centers. These Deep Neural Networks (DNN) can interpret signals to recognize objects or situations to drive decision processes. However, their integration into embedded systems remains challenging due to their high computing needs. This year CEA LIST has continued his work on designing specific solutions to ease the integration of DNN in embedded systems.

Thus, this presentation will focus on our last results regarding: the integration of TensorRT and a RTL library DNeuro optimized for FPGAs into our DNN design environment N2D2 ; as well as the design of a scalable and energy-efficient processor PNeuro and its FDSOI 28nm prototype. These results open important perspectives regarding the development of smart energy-efficient solutions based on Deep Neural Networks.

Biography

Nicolas Ventroux is the head of the Computing and Design Environment Laboratory at CEA LIST. He received a M.Sc and a M.Eng. in Computer Sciences from INSA, Rennes in 2003, and the PhD degree in Electronics from the University of Rennes in 2006. He is a CEA Senior Expert in multiprocessor modeling and design, and was a project manager of many national and European projects. He was a scholar visitor at Carnegie Mellon University (CMU) in the CALCM laboratory in 2012. He wrote, as author and co-author, 12 patents and several papers in conferences and journals in the multi and many-core domains. He is also a reviewer for several international conferences and journals since 2006.