Wei Zhang
Hong Kong University of Science and Technology, Hong Kong
Modeling and Optimization of High-Level Synthesis for FPGA
Abstract
FPGAs speed up the system performance significantly with low energy consumption, attracting increasing attention in a wide variety of applications. However, the implementation on FPGAs requires deep comprehension of the hardware architecture and great effort to write RTL codes, which is error-prone and time-consuming. By automatically synthesizing behavioral descriptions into RTL codes, HLS has been developed to improve the FPGA programmability. HLS relies on the use of synthesis directives to generate digital designs meeting a set of specifications. However, the selection of directives depends largely on designer experience and knowledge of the target architecture and digital design. Existing automated methods of directive selection are very limited in scope and capability to analyze complex design descriptions in high-level languages to be synthesized using HLS. This talk introduces a comprehensive model-based analysis framework, COMBA, which is capable of analyzing the effects of a multitude of directives related to functions, loops and arrays in the design description. Moreover, since routing congestion can significantly affect the performance, and routing congestion estimation is absent or inaccurate in existing HLS design methods and tools, we propose a novel method to predict routing congestion in HLS using machine learning and map the expected congested regions in the design to the relevant high-level source code. This early and accurate congestion estimation is of great benefit to guide the optimization in HLS and improve the efficiency of implementation.
Biography
Wei Zhang is currently an Associate Professor with the Department of Electronic and Computer Engineering, the Hong Kong University of Science and Technology, Hong Kong, where she established the Reconfigurable System Laboratory. She was an Assistant Professor with the School of Computer Engineering, Nanyang Technological University, Singapore, from 2010 to 2013. She authored over 100 technical papers in referred international journals and conferences and authored three book chapters. Her current research interests include reconfigurable system, power and energy management, embedded system security, and emerging technology. Her team has won the best paper award in ISVLSI 2009 and ICCAD 2017. She currently serves as Associate Editor of the ACM Transactions on Reconfigurable Technology and Systems (TRETS), Associate Editor of the IEEE Transaction on Very Large Scale Integration (TVLSI) Systems, Associate Editor of the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Associate Editor of the ACM Transactions on Embedded Computing Systems (TECS), and Associate Editor of the ACM Journal on Emerging Technologies in Computing Systems (JETC). She also serves on many organization committees and technical program committees, such as DAC, ICCAD, ASPDAC, CASES, FPGA, FCCM, FPL, etc.