Tanguy Sassolas

CEA-LIST, France

Challenges for scalable quantum control electronics

Abstract

Quantum computing with its unique ability to process superposed states within a limited number of qubits shall provide exponential acceleration to a wide variety of applications unsolvable by classical computing. Reaching a significant practical advantage will require a steep scaling of qubit counts to cope with the redundancy implied by quantum error correction (QEC) techniques. This will demand an equivalent scaling of the quantum control electronics, whose challenges this presentation will address in the context of solid-state qubits.

Biography

Tanguy Sassolas is high-performance and quantum computing program manager at CEA LIST. He received a M.Sc. and a M.Eng. in Electronics from ENSEEIHT, Toulouse in 2008 with a specialty in computing architecture.
Since then his architectural work focused on the design of manycore architectures. In particular, he was deeply involved in the conception of the SESAM multiprocessor architecture simulation and exploration environment. To address the design of hardware support for efficient performance, power and thermal management, he conceived novel methods for joint functional/thermal co-simulation and co-emulation. To cope with simulation performance bottlenecks of VP simulation he investigated parallelization strategies leading to the definition of the SCale parallel SystemC kernel.
He lead CEA’s EDA and Architecture Lab that performed the virtual prototyping and exploration of the European Processor Initiative, designed the embedded neural network processor PNeuro and developed a formal framework for the analysis of processor temporal behavior for both safety and security.
Today, he is strongly involved in the development of major research programs to address the corrective control of imperfect qubits at scale.