{"id":219,"date":"2019-10-29T21:55:26","date_gmt":"2019-10-29T21:55:26","guid":{"rendered":"http:\/\/mpsoc-forum.org\/archive\/2023\/?page_id=219"},"modified":"2023-06-05T19:01:13","modified_gmt":"2023-06-05T19:01:13","slug":"mpsoc20-book","status":"publish","type":"page","link":"http:\/\/mpsoc-forum.org\/archive\/2023\/mpsoc20-book\/","title":{"rendered":"MPSoC Book"},"content":{"rendered":"\n
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A Multi-Processor System-on-Chip (MPSoC) is the key component for complex applications. These applications put huge pressure on memory, communication devices and computing units. This book, presented in two volumes \u2013 Architectures and Applications \u2013 therefore celebrates the 20th anniversary of MPSoC, an interdisciplinary forum that focuses on multi-core and multi-processor hardware and software systems. It is this interdisciplinarity which has led to MPSoC bringing together experts in these fields from around the world, over the last two decades.<\/p>\n\n\n\n
Table of Contents<\/a><\/p>\n<\/div>\n\n\n\n Multi-Processor System-on-Chip 1 covers the key components of MPSoC: processors, memory, interconnect and interfaces. It describes advance features of these components and technologies to build efficient MPSoC architectures. All the main components are detailed: use of memory and their technology, communication support and consistency, and specific processor architectures for general purposes or for dedicated applications.<\/p>\n\n\n\n Edited by<\/em>:<\/p>\n\n\n\n Liliana Andrade<\/strong>, Universit\u00e9 Grenoble Alpes<\/em>, France ISBN : 9781789450217 <\/p>\n\n\n\n Multi-Processor System-on-Chip 2 covers application-specific MPSoC design, including compilers and architecture exploration. This second volume describes optimization methods, tools to optimize and port specific applications on MPSoC architectures. Details on compilation, power consumption and wireless communication are also presented, as well as examples of modeling frameworks and CAD tools. Explanations of specific platforms for automotive and real-time computing are also included.<\/p>\n\n\n\n Edited by<\/em>:<\/p>\n\n\n\n Liliana Andrade<\/strong>, Universit\u00e9 Grenoble Alpes<\/em>, France ISBN : 9781789450224 Table of Contents<\/a><\/p>\n<\/div>\n<\/div>\n\n\n\n The French versions of the books are now available:<\/p>\n\n\n\n https:\/\/www.istegroup.com\/fr\/produit\/systemes-multiprocesseurs-sur-puce-1\/<\/a> Ahmed Jerraya<\/em>, CEA Tech Liliana Andrade<\/em>, Associate Professor, TIMA Laboratory
Fr\u00e9d\u00e9ric Rousseau<\/strong>, Universit\u00e9 Grenoble Alpes<\/em>, France<\/p>\n\n\n\n
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Publication Date : May 2021
Hardcover : 316 pp<\/p>\n<\/div>\n<\/div>\n\n\n\nMulti-Processor System-on-Chip 2
Applications
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Fr\u00e9d\u00e9ric Rousseau<\/strong>, Universit\u00e9 Grenoble Alpes<\/em>, France<\/p>\n\n\n\n
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Publication Date : May 2021
Hardcover : 266 pp<\/p>\n<\/div>\n\n\n\n<\/figure><\/div>\n\n\n\n
https:\/\/www.istegroup.com\/fr\/produit\/systemes-multiprocesseurs-sur-puce-2\/<\/a><\/p>\n\n\n\nContact Information<\/h3>\n\n\n\n
Director, Cyber Physical Systems Program<\/strong>
ahmed.jerraya@cea.fr<\/a><\/p>\n\n\n\n
MPSoC\u201920 Book Editor<\/strong>
liliana.andrade@univ-grenoble-alpes.fr<\/a><\/p>\n\n\n\n