Sponsored by IEEE Circuits and Systems Society and EDAA
Organized by Ahmed A. Jerraya, TIMA Laboratory, Grenoble, France &  Wayne H. Wolf, Princeton University, Princeton, USA

Application-Specific Multi-Processor SoC

9 - 13 July 2001, Aix-les-Bains, France

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The principal objective of this course is to study the emerging areas of Application-Specific Multi-Processor System On Chip. The main idea is to gather key R & D people from the different domains required to master this new kind of systems where designers have to integrate more than one instruction set processor on a single chip, these may include DSPs and microcontrollers. Typical applications are wireless, image processing, XDSL, networking processors and game computers. Four main problems make the design of application-specific Multi-Processor System On Chip very hard and expensive:

  • system architecture with an on-chip communication network
  • software targeting and executive code generation using (or not) an Operating System (OS)
  • system validation at the functional level and the cycle-accurate level where multiple ISSs may be required
  • testing the overall system.
  • The 5-day course is organized as a set of 9 half-day sessions including, each, a tutorial that gives a comprehensive presentation of a specific area. The sessions will also include invited talks describing state-of-the-arts research in academia and advanced practices from industry.

       Dr. Ahmed A. Jerraya , TIMA Laboratory, 46 Avenue Félix Viallet, 38031  Grenoble CEDEX, France
               Fax: +33 476 47 38 14                     Phone: +33 476 57 48 64