14th International Forum on Embedded MPSoC and Multicore
July 7-11, 2014, Margaux, France
Slides available here!
Prof. Hironori Kasahara, Waseda University, Japan
Multi-platform Automatic Parallelization and Power Reduction by OSCAR Compiler
Multicore processors have been attracted much attention for low power high performance execution. We can find multicores everywhere, for example inside smartphones, wearable devices, television sets, medical systems, automobiles, trains, airplanes, cloud servers, supercomputers and so on. To attain the high performance and low power in reasonable cost quickly, software especially a parallelizing compiler is important. This talk introduces the OSCAR multiplatform compiler that allows us to automatically parallelize sequential C or Fortran programs and reduce power consumption during application program execution and its performance on various multicore processors and operating systems including an Intel Haswell 4 core multicore with Linux, ARM 4 core multicores with Android and eT-kernel, IBM 8 core Power multicore with Linux, Fujitsu 4 core SPARC Multicore with Solaris and Tilera 64 core multicore with Linux.
Hironori Kasahara received a PhD in electrical engineering from Waseda University, Tokyo, in 1985 where he has been a professor of computer science since 1997, and a director of the Advanced Multicore Research Institute. He was a visiting scholar at University of California, Berkeley and University of Illinois at Urbana-Champaign's Center for Supercomputing R&D. He received Young Author Prize at International Federation of Automatic Control World Congress, an IPSJ Sakai Memorial Special Research Award and a Science and Technology Prize in the commendation by Minister of Education, Culture, Sports, Science and Technology. He led four Japanese national projects on parallelizing compilers, multicores and green computing in METI/NEDO. He has served as a chair or a member of 220 government and society committees including IPSJ SIG on Comput Architecture, MEXT Earth Simulator and K supercomputer and METI computer research roadmap.
His works were presented as 195 papers, 120 invited talks, 26 patents and 450 newspapers and web articles. Currently, he is a member of Board or Governors and a chair of Multicore STC in IEEE Computer Society.
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