Slides available here!


Speaker:

Dr. Iakovos Mavroidis, Foundation for Reaserch and Technology -- Hellas (FORTH), Greece

Title:

NUMA-like architecture for Microservers

Abstract:

A few years ago power was an afterthought for data center operators. Things are different today. Utility costs have risen and many data centers are operating at or near their power and cooling capacity. In order to address this dramatic increase in power consumption, data center providers are turning to new architectures, such as Microservers. Microservers utilize a large number of lightweight computing nodes configured to share an infrastructure, such as power, cooling fans, and I/O devices in a common chassis. A crucial challenge in this new evolving environment of Microservers, is to adapt existing energy-saving and high-performance techniques, as well as to come up with new ones. Bringing compute and memory components closer together, Microservers allow architecture designers to use a fast and low-power interconnection layer between different "remote" computing nodes. This talk will describe a scalable Microserver architecture, which takes advantage of these new communication characteristics in order to build a novel cluster-based, NUMA-like infrastructure. This work is part of the EUROSERVER FP7 project, which targets an energy-efficient Microserver architecture.

Bio:

Dr. Iakovos Mavroidis is a member of Computer Architecture and VLSI Systems (CARV) Laboratory of the Institute of Computer Science, FORTH in Greece and a Visiting Professor in Computer Science at the University of Crete. From 1991 to 1995, he was awarded two gold and two bronze medals in national competitions and two honorable mentions in International Olympiads in Mathematics and Computer Science. He received his M.Sc. degree in Electrical Engineering and Computer Science from the University of California at Berkeley in 2001. He worked at Sun Microsystems in 2000, designing a network interface card. From 2001 to 2002 he was with MIPS Technologies, where he was responsible for the design of the Load Store Unit and Memory Management Unit of the R20K microprocessor. From 2004 to 2006 he was with Ellemedia Technologies designing a network processor as a senior engineer. From 2007 to 2010 he was with Virtual Trip as a Manager of the Integrated Systems Group. In 2011, he received his Ph.D. degree from the Department of Electronic and Computer Engineering at the Technical University of Crete in Greece. He was the author and Technical Manager of two EU projects (FASTCUDA and VPlanet) and he has participated in several other EU research projects (EUROSERVER, DeSyRe, ENCORE, OSMOSIS, HEAP, NPMADE, LYDIA).



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