Frederic Rousseau

Grenoble-Alpes University, France

Distributing Memory Bank Accesses in Many-Core Architectures

Abstract

In many-core architectures, composed of a set of clusters, each cluster integrates cache memory and a local memory shared by all the cores of the cluster. Local memory bandwidth should be able to support all the accesses requested by the cores to get the maximum performance. One solution is to split the local memory in several banks, accessible in parallel. If some cores get access at the same bank simultaneously, this leads to memory bank conflict, increasing the latency. We focus in this work on hardware solutions to improve the performances of multi-bank accesses, going from hash-function address coding to additional memory banks. All these solutions have been simulated on the MPPA Kalray processor and we provide a comparison and discussion.

Biography

Pr Frédéric Rousseau received the Engineer degree in computer science and electrical engineering from the University of Grenoble in 1991 and a Ph.D. in computer science in 1997 from the University of Evry – France. He has hold an assistant professor position at the University of Grenoble since October 1999 and a professor position since 2007. He is researcher in TIMA lab. His research interest concerns Multi-Processor Systems-on-Chip design and architecture, prototyping of hardware/software systems, including reconfigurable systems and high-level synthesis for embedded systems. Pr Frédéric Rousseau received the Engineer degree in computer science and electrical engineering from the University of Grenoble in 1991 and a Ph.D. in computer science in 1997 from the University of Evry – France. He has hold an assistant professor position at the University of Grenoble since October 1999 and a professor position since 2007. He is researcher in TIMA lab. His research interest concerns Multi-Processor Systems-on-Chip design and architecture, prototyping of hardware/software systems, including reconfigurable systems and high-level synthesis for embedded systems.

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