10th International Forum on Embedded MPSoC and Multicore
June 28 - July 2 2010, Gifu city, Gifu, Japan
June 28 - July 2 2010, Gifu city, Gifu, Japan
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AGENDA LECTURES Final Program REGISTRATION LOCATION & HOTEL SPONSORSHIP |
| MPSoC'10
Information: Yoshinori Takeuchi and Hiroyuki Tomiyama E-mail: mpsoc10(at)vlsilab.ics.es.osaka-u.ac.jp |
| MPSoC
Information: Ahmed Jerraya CEA-LETI, MINATEC 17 rue des Martyrs 38054, Grenoble, France Tel: +33 438 780 128 Fax: +33 438 785 182 E-mail: ahmed.jerraya(at)cea.fr |
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MPSoC'10 program
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Keynotes on key MPSoC and multicore SoC trends.
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Technical sessions to present strategic directions and state-of-the-art research. The program will be made of in-depth technology challenge presentations and educational panels made of short keynotes followed by discussions. All the presentations will be made by CTO-level speakers. The sessions will cover:
- MPSoC Architecture
- On-chip interconnect for MPSoC and Multicore architectures
- Memory architecture for parallel computing
- 3D IC and Computing
- MPSoC Applications Platforms
- Killer applications for MPSoC
- MPSoC and Multicore platforms
- HW vs. SW reconfiguration
- Mixed signal
- Control Theory applied to MPSoC
- MPSoC Design Methodologies
- HW and SW Composition
- HW-SW debug & verification
- Testing
- Case studies
- HW-SW interfaces codesign.
- SW
Programming
- Embedded RTOS
- Flexible CPU
- Parallel programming models
- Execution Models for MPSoC and Multicore architectures
- MPSoC Architecture
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An executive half day session including presentations by top executives, investors and analysts to discuss challenges and opportunities for future SoC applications and technologies.